Cadence AMS Kit Workshop

AMS Methodology Kit Workshop
Moscow, Moscow State Engineering Physics Institute (MEPhI)
22 September 2009

Join us for an in-depth methodology workshop, featuring our kit and flows based on IC 6.13 of our Virtuoso® Custom Design Platform. Cadence’s long experience in mixed-signal methodologies is illustrated in its most recent tool releases over a real-life design implemented in 90nm CMOS Process.

Test drive the latest flows and tools with this workshop! To register contact Bernd Reinkemeier.
The AMS Kit

The AMS Methodology Kit contains a complete front-to-back, real-life reference design of an Ethernet PHY and a Sigma-Delta Fractional-N PLL from behavioral models to layout views. The kit demonstrates the different aspects of design and verification for both digital and analog, front- and back-end, from concept validation to final sign-off verification. Although the kit is focused on methodology demonstration, the design database creates a value by itself. Highlights of the Cadence AMS tools are also captured through the kit.

The AMS kit integrates Tools, Methodologies, and design

The Reference Design

Two reference designs are used in this workshop:

1. 10/100 Base-T Ethernet-PHY Transceiver, comprising over 30K analog transistors and 60K digital gates and uses 4 different power supply domains. Features several high performance blocks like 6-bit flash ADC, 250MHz PLL, and analog equalizer.

2. Sigma-Delta Fractional-N PLL, a 2.4GHz synthesizer that contains 20k devices and includes a 5GHz LC VCO, a high-speed divider, on-chip regulators, and a calibration mechanism for loop filtering and VCO.

Block Diagrams 1. 10/100 Base-T Ethernet PHY, 2. Fractional-N PLL

The Methodology

The AMS Methodology Kit illustrates five major design flows, all of which are demonstrated on the reference designs and interact and work together for a complete front-to-back solution:

1. Design environment and infrastructure
2. Top-down functional verification
3. AMS IP block creation and reuse
4. AMS IP export and integration
5. Top-down physical design

Cadence Comprehensive AMS Design Methodology flow diagram

The AMS Methodology Kit is organized as a set of independent modules, each containing one or more documented flow scenarios that relate to one or more of the three major flows. The AMS kit modules give a methodology-oriented approach for major design challenges:

How to setup your design environment
How to create a simulation plan for your system and implement it
How to effectively create, simulate and optimize analog blocks and physical layout
How to maintain design integrity through constraint-driven flow
How to shorten design cycle by pre-layout, and routing parasitic estimation
How to perform chip assembly and physical verification (DRC/LVS/RCX)
… And many other topics

The Tools

Recent Cadence tool releases are used to conduct the workshop, including:

IC6.1 MMSIM IUS SOC ASSURA

Although the workshop is not tool-oriented, attendees will get an impression of using the new tools.

The Workshop

This flow workshop presents selected parts of the Cadence AMS Methodology Kit in overview-mode. The workshop is conducted by a Cadence flow and design expert and facilitates a discussion of typical design challenges and new solution approaches.

Target Audience

Whether you are a designer of full-custom ICs, a manager of an IC design team, or part of a CAD group, this workshop enables you to stay up-to-date regarding these Cadence tools/methodologies and to exchange experience with Cadence experts and design community peers.

How to register

Workshop date: 22nd September 2009
Workshop location: Moscow, Moscow State Engineering Physics Institute (MEPhI)
To register for this workshop, email Bernd Reinkemeier.

Click here for further information on the AMS kit.